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Hercules — Dual H-Bridge Motor Controller

A compact 2-layer PCB motor controller built around the Toshiba TB6612FNG dual H-bridge driver, capable of independently controlling two DC motors with variable speed and bidirectional drive. Designed in Altium Designer as a learning exercise in power electronics and motor driver integration.

Altium Designer TB6612FNG Dual H-Bridge 2-Layer PCB 1.2A / 3.2A peak Oct–Nov 2023

Project Overview

The Hercules board is a standalone motor driver module designed to act as an interface between a microcontroller (such as a Raspberry Pi or STM32) and two DC brushed motors. The name "Hercules" reflects the board's purpose: brute mechanical force delivery, controlled precisely by digital signals.

The design goal was to build the smallest possible board that could drive two motors bidirectionally at meaningful current levels, while being easy to interface with via standard 0.1-inch pitch headers. Every component choice — from the IC to the capacitor dielectrics — was deliberate and grounded in understanding why, not just following a reference schematic.

Motor Driver IC
TB6612FNG
Toshiba SSOP-24
Channels
2
Independent H-bridges
Continuous Current
1.2A
Per channel (avg)
Peak Current
3.2A
Per channel (max)
Motor Supply
2.5–13.5V
VBATT+ rail
Logic Supply
2.7–5.5V
VCC rail
PCB Stackup
2-Layer
Top + Bottom Cu
Trace Rating
2.4A
Motor output traces
PWM Frequency
100kHz
Speed control
EDA Tool
Altium
Designer
Holes
26
25× 0.71mm, 1× 2.2mm
Completed
Nov 2023
Gerbers generated 2023-11-27

Bill of Materials

RefComponentValue / Part NumberPackageFunction
U1 TB6612FNG,C,8,EL Toshiba TB6612FNG SSOP-24 Dual H-bridge motor driver
C1 CL10B104KA8NNNC 100nF, X5R, 25V 0603 VCC high-frequency bypass
C2 GRM21B series 10µF, X5R, 25V 0805 VCC bulk decoupling
C3 CL10B104KA8NNNC 100nF, X5R, 25V 0603 VBATT+ high-frequency bypass
C4 GRM21B series 10µF, X5R, 25V 0805 VBATT+ bulk decoupling
R1 SMD Resistor 5.1kΩ 0805 LED current limiting
D1 LTST-C171KGKT LED, Green, Clear 0805 SMD Power-on indicator
J1 8P-HDR (Digi-Key 732-5321-ND) 8-pin, 2.54mm pitch Through-hole Control signals input
J2 8P-HDR (Digi-Key 732-5321-ND) 8-pin, 2.54mm pitch Through-hole Motor output + power in

The TB6612FNG Motor Driver IC

The TB6612FNG is Toshiba's dual H-bridge motor driver IC, a popular choice for hobby robotics and embedded motor control. Each of the two H-bridges is built from four N-channel and P-channel MOSFETs internally, with separate logic and power supply domains, integrated protection circuitry, and low on-resistance output stages.

Why TB6612FNG Over Discrete MOSFETs?

Building a dual H-bridge from discrete MOSFETs requires 8 switching devices, 8 gate drivers, dead-time insertion circuitry (to prevent shoot-through), and 8 protection diodes. The TB6612FNG integrates all of this — two complete H-bridges with gate drive, dead-time control, thermal shutdown, and back-EMF protection diodes — in a 24-pin SSOP package. For a two-motor drive application at these current levels, integration is the correct engineering choice.

What "H-Bridge" Means

An H-bridge is named after its circuit topology: four switching elements arranged so that the load (motor) sits in the middle of an H shape. By activating different pairs of switches, current can be forced through the motor in either direction — enabling forward and reverse rotation without mechanical relays.

Complete Pin Map (SSOP-24)

Channel A
1AO1Motor A Out 1 (MOTOR_A+)
2AO1Motor A Out 1 (doubled for current)
5AO2Motor A Out 2 (MOTOR_A-)
6AO2Motor A Out 2 (doubled for current)
21AIN1Channel A direction input 1
22AIN2Channel A direction input 2
23PWMAChannel A PWM speed input
Channel B
11BO1Motor B Out 1 (MOTOR_B+)
12BO1Motor B Out 1 (doubled for current)
7BO2Motor B Out 2 (MOTOR_B-)
8BO2Motor B Out 2 (doubled for current)
17BIN1Channel B direction input 1
16BIN2Channel B direction input 2
15PWMBChannel B PWM speed input
Power & Control
20VCCLogic supply (2.7V–5.5V)
24VM1Motor supply 1 (VBATT+)
13VM2Motor supply 2 (VBATT+)
14VM3Motor supply 3 (VBATT+)
19STBYStandby (HIGH = active)
Ground
3PGND1Power ground, H-bridge A
4PGND1Power ground, H-bridge A
9PGND2Power ground, H-bridge B
10PGND2Power ground, H-bridge B
18GNDLogic ground
Why Are Output Pins Doubled?

Each motor output pin (AO1, AO2, BO1, BO2) is duplicated — two pins bonded together internally. Each SSOP pin pad can handle approximately 0.5–1A of current before heating becomes a concern. By doubling the physical pad count, the IC can safely deliver 1.2A continuous per channel. Similarly, PGND1 and PGND2 are doubled to handle the return current without excessive voltage drops across the ground connection.

H-Bridge Topology Physics

An H-bridge is the fundamental circuit for bidirectional motor control. Understanding its operation at the transistor level reveals why specific control logic sequences are needed and why some switch combinations are actively forbidden.

The Four-Switch Bridge

Each H-bridge channel consists of four transistors: an upper-left (UL), upper-right (UR), lower-left (LL), and lower-right (LR) switch. The motor winding connects between the midpoints of the two half-bridges.

VBATT+ ─────┬──────────────┬───── │ │ [UL] [UR] ← High-side P-channel MOSFETs │ │ MOTOR_A+ ┤ MOTOR ├ MOTOR_A- │ ┌──────┐ │ ├───┤ M ├───┤ │ └──────┘ │ [LL] [LR] ← Low-side N-channel MOSFETs │ │ GND ───────┴──────────────┴───── Forward (CW): UL=ON, LR=ON, UR=OFF, LL=OFF → Current flows left-to-right Reverse (CCW): UR=ON, LL=ON, UL=OFF, LR=OFF → Current flows right-to-left Brake: LL=ON, LR=ON, UL=OFF, UR=OFF → Motor terminals shorted to GND Coast: All OFF → Motor terminals floating (high-impedance)

Forward Rotation (CW Mode)

To drive the motor clockwise: upper-left and lower-right switches close simultaneously. Current flows from VBATT+ through UL, through the motor left-to-right, through LR, to GND. The motor sees the full rail voltage (minus transistor drops), which creates a magnetic field in the winding that spins the rotor forward.

The current magnitude depends on the motor's resistance: I = (VBATT − V_drop) / R_motor. At startup, R_motor is just the DC winding resistance (typically 1–10Ω for small motors). This is why startup current is much higher than running current — during acceleration, no back-EMF exists yet to oppose supply voltage.

Why Shoot-Through Must Be Prevented

If both UL and LL (or UR and LR) turn on simultaneously, a direct short circuit forms from VBATT+ to GND through only the transistor on-resistances. This creates a near-unlimited current path that will destroy both transistors in microseconds.

Shoot-Through — The Forbidden State

In any H-bridge, both switches in the same half-bridge leg must NEVER be on simultaneously. The TB6612FNG's internal control logic enforces dead-time between switching transitions — a brief period where both high and low-side switches are OFF — preventing shoot-through even if the microcontroller applies invalid input combinations simultaneously.

Current in the Motor During Switching

When a PWM cycle turns off the drive transistors, current cannot instantly drop to zero — the motor winding's inductance resists any abrupt change in current. This is Faraday's law: V = L × dI/dt. The winding acts as an energy-storage element; when the transistors switch off, the stored magnetic energy must flow somewhere.

Without a current path, the inductor would generate a voltage spike large enough to punch through any transistor in the circuit. The solution is recirculation diodes — also called flyback or freewheeling diodes — which provide a safe current path when the switches open.

Back-EMF and Flyback Protection

Back-EMF: The Motor as a Generator

When a DC motor spins, the rotating armature cuts through the magnetic field of the stator. By Faraday's law, this generates a voltage — the back-EMF (BEMF) — that opposes the applied supply voltage. The motor's actual operating current is:

DC Motor Running Current
I_run = (V_supply − V_BEMF) / R_winding
where V_BEMF = k_e × ω (k_e is the motor's back-EMF constant, ω is angular velocity)
At stall: ω=0, V_BEMF=0, I_stall = V_supply / R_winding (maximum current)
At no-load speed: V_BEMF ≈ V_supply, I ≈ 0 (minimum current)

This has critical implications for motor driver design: the driver must handle full stall current at startup, and the instantaneous current at reversal (when BEMF and supply both push current in the same direction) can briefly reach 2× stall current.

Inductive Kickback During Switching

During PWM switching (100kHz on this board), the drive switches open and close 100,000 times per second. Each time switches open, the winding inductance generates a voltage spike. The magnitude depends on the switch speed:

Inductive Spike Voltage
V_spike = −L × (ΔI / Δt)
A 1mH motor winding switching 1A in 100ns generates: V = 1e-3 × (1/100e-9) = 10,000V
Without protection, this spike destroys the output MOSFETs immediately.

Integrated Flyback Diodes

The TB6612FNG integrates four catch diodes per H-bridge (eight total per chip) across each output transistor. These diodes are forward-biased exactly when needed: when the drive switches open and the winding tries to sustain current via a voltage reversal, the diodes clamp the spike to VBATT+ + V_diode (≈ 0.7V) on the high side, or to GND − 0.7V on the low side.

Why You Don't Need External Snubber Diodes

With integrated flyback diodes, external freewheeling diodes (common in discrete H-bridge designs) are unnecessary. The diodes are placed physically adjacent to each MOSFET on the silicon die, giving them the shortest possible clamping path. This is one key advantage of integrated motor driver ICs over discrete implementations.

Short-Brake Mode Uses This Physics Intentionally

When both low-side switches (LL and LR) are turned on with both high-side switches off, the motor terminals are shorted to GND through the low-side MOSFETs. The motor's rotating inertia continues spinning the armature, which generates back-EMF. This back-EMF now drives a braking current through the low-impedance path (LL and LR), creating a strong electromagnetic braking torque that rapidly decelerates the motor. This is regenerative short braking — far more effective than simply cutting power (coast mode).

Power Architecture: Two Independent Rails

The board operates from two distinct supply rails, kept separate by design to prevent motor noise from corrupting the logic signals and to allow independent voltage selection.

VCC — Logic Supply
2.7–5.5V
Controls internal logic, input threshold levels, STBY pin
VBATT+ — Motor Supply
2.5–13.5V
Directly switched to motor terminals by H-bridge MOSFETs

Why Separate Supplies Are Essential

A brushed DC motor is an electrically noisy device. Each time the brushes commutate (switch between armature segments), a spark occurs at the brush-commutator interface. This generates broadband conducted and radiated electromagnetic noise. At 100kHz PWM, the switching transients on VBATT+ can exceed hundreds of millivolts peak-to-peak.

If VCC and VBATT+ were the same net, this switching noise would appear directly on the logic supply and could cause spurious state changes in the control logic, false readings on input pins, or false STBY assertions. By using separate supplies (even from the same source, separated by a ferrite bead in larger systems), this interference is isolated.

Three Motor Supply Pins (VM1, VM2, VM3)

The TB6612FNG has three VM pins (pins 13, 14, and 24), all connected to VBATT+. This is intentional for the same reason output pins are doubled: distributing high current across multiple package leads reduces the resistance-per-pin to ground, lowers I²R heating in the package leads, and improves current handling. On the PCB, all three must connect to the VBATT+ plane with adequate copper.

Maximum VM Voltage: 15V Absolute, 13.5V Operating

The 15V absolute maximum is the silicon breakdown voltage of the integrated MOSFETs. Exceeding this — even briefly — permanently damages the output transistors. Inductive spikes from long motor cables can transiently push the VM rail above this. For longer motor leads (> 30cm), an additional TVS (transient voltage suppressor) diode on VBATT+ is advisable to clamp spikes below 15V.

Decoupling Capacitor Strategy

Four capacitors are placed on this board — two on VCC and two on VBATT+ — each pair consisting of a 100nF (0603) and a 10µF (0805). This two-value strategy is intentional and covers two different frequency domains of power supply noise.

How Capacitors Filter Different Frequencies

A capacitor's impedance is Z = 1/(2πfC). A large capacitor has low impedance at low frequencies but behaves poorly at high frequencies because its equivalent series inductance (ESL) — the parasitic inductance of its leads and body — starts dominating. A small capacitor has high impedance at DC but excels at filtering high-frequency noise because its ESL is very small.

Capacitor Impedance vs Frequency
|Z| = √((1/(2πfC))² + (2πfL_ESL)²)
At low f: Z ≈ 1/(2πfC) — capacitive, decreasing with frequency
At SRF: Z = R_ESR (minimum, purely resistive)
Above SRF: Z ≈ 2πfL_ESL — inductive, increasing with frequency
10µF 0805 SRF ≈ 1–5MHz; 100nF 0603 SRF ≈ 20–60MHz

Why X5R Dielectric?

The X5R rating in EIA dielectric classification means the capacitance stays within ±15% of its nominal value across a temperature range from −55°C to +85°C. This contrasts with Y5V or Z5U dielectrics, which can lose 50–80% of their capacitance at temperature extremes or under DC bias — making their stated value essentially fictitious under real operating conditions.

DC Bias Derating of MLCCs

X5R and X7R capacitors still exhibit voltage derating: a 10µF/25V capacitor operating at 12V (VBATT+) retains only about 60–70% of its nominal capacitance due to the DC bias effect on the ferroelectric dielectric. Selecting 25V-rated caps for a 12V rail provides sufficient derating margin. Selecting only 16V-rated caps would cause significant capacitance loss.

Per-Cap Placement Requirement

The Hercules schematic includes a specific application note (visible in the schematic title block): "Condensers for noise absorption (C1, C2, C3, and C4) should be connected as close as possible to the IC." This is because every millimeter of PCB trace between capacitor and IC pin adds ESL (~1nH/mm), which degrades the high-frequency effectiveness of the bypass capacitor.

Loop Area and High-Frequency Bypassing

What matters for high-frequency bypass is not just the capacitor's own ESL, but the total loop area formed by the path: IC power pin → trace → capacitor → trace → IC GND pin. This loop acts as an antenna — minimizing its area minimizes the inductance and maximizes how effectively the cap can absorb switching transients.

Control Logic: Direction and Enable

Each H-bridge channel is controlled by three input signals: IN1, IN2 (direction), and PWM (enable/speed). The STBY pin controls both channels simultaneously.

Complete Truth Table

IN1 (AIN1/BIN1)IN2 (AIN2/BIN2)PWMSTBYOUT1OUT2Mode
HHH/LHLL Short Brake
LHHHLH CCW
LHLHLL Short Brake
HLHHHL CW
HLLHLL Short Brake
LLHH Hi-Z Stop
H/LH/LH/LL Hi-Z Standby

Understanding Each State

CW / CCW (Driven Rotation)

When IN1=H, IN2=L, PWM=H: the internal logic activates the upper-left and lower-right MOSFETs, driving current through the motor in the "forward" direction. Setting IN1=L, IN2=H reverses the active switch pair, reversing current direction and thus motor rotation. The PWM input acts as an enable: when PWM=H, the selected drive switches are active. When PWM=L, both output pins are pulled to GND (short brake) regardless of IN1/IN2.

Short Brake (IN1=H, IN2=H)

Both low-side switches activate simultaneously, connecting both motor terminals to GND. The motor generates its own braking current via back-EMF as previously described. This state also occurs automatically when PWM goes LOW during a driven state — meaning the PWM signal can be used for speed control via duty cycle without ever entering the high-impedance (coast) state.

Stop / Coast (IN1=L, IN2=L)

All four MOSFETs turn off, leaving both motor terminals floating (high-impedance). The motor freewheels — it continues spinning due to mechanical inertia with no electrical braking torque. This is the slowest braking mode. Current regenerated by back-EMF must flow through the internal flyback diodes to the VBATT+ rail.

Speed Control via PWM

For speed control in CW or CCW direction, set the appropriate IN1/IN2 state and then vary the PWM duty cycle. The TB6612FNG's internal logic sees IN1=H, IN2=L on each cycle. When PWM=H (ON phase): current flows through the motor. When PWM=L (OFF phase): the circuit enters short-brake (both low-side switches on). The motor sees an average voltage equal to VBATT+ × duty cycle — controlling rotational speed.

PWM Speed Control Physics

Pulse-Width Modulation (PWM) controls average power delivery to a load by rapidly switching the supply on and off. The ratio of on-time to total period is the duty cycle, D.

Average Voltage from PWM
V_avg = V_supply × D = V_supply × (t_on / T)
where D = duty cycle (0 to 1), t_on = on-time, T = period (1/f_PWM)
At D=0%: V_avg = 0V, motor stopped
At D=50%: V_avg = V_supply/2, motor at ~half speed
At D=100%: V_avg = V_supply, motor at full speed

Why 100kHz Switching Frequency?

The 100kHz PWM frequency on the Hercules board (noted in the schematic: Fsw = 100kHz) was selected for two reasons:

1. Above audible range. PWM frequencies below 20kHz cause the motor windings to vibrate at the switching frequency, producing an audible whine. At 100kHz, this vibration is completely inaudible to humans (typical upper limit ~20kHz). The motor runs silently.

2. Current ripple reduction. The motor's inductance filters the PWM waveform into an approximately DC current. Higher switching frequency means smaller current ripple (ΔI = V×t_on/L). At 100kHz vs 10kHz, current ripple is 10× lower for the same inductance, giving smoother torque, less motor heating, and better low-speed control.

PWM Current Ripple in Motor Winding
ΔI = (V_supply × D × (1−D)) / (L × f_PWM)
At D=0.5 (50%), V=12V, L=1mH, f=100kHz:
ΔI = (12 × 0.5 × 0.5) / (0.001 × 100000) = 3 / 100 = 0.03A (30mA ripple)
At 10kHz: ΔI = 0.3A (10× higher ripple) — notable torque ripple and more motor heating

The Motor as a Low-Pass Filter

A DC motor winding has both resistance (R) and inductance (L). Together they form an RL low-pass filter with a time constant τ = L/R. For a typical small DC motor (L ≈ 1mH, R ≈ 5Ω), τ = 200µs. At 100kHz, the PWM period is only 10µs — much shorter than τ. This means the inductor strongly attenuates the switching ripple, and the motor's rotor (which has far more mechanical inertia) sees only the DC average, resulting in smooth rotation.

Braking Modes: Short Brake vs. Coast

The TB6612FNG supports two distinct stop behaviors, and choosing between them depends on the application's requirements for deceleration rate and positional precision.

Short Brake (Active Braking)

Both low-side switches (LL and LR) on simultaneously. Both motor terminals connected to GND. The motor acts as a generator: back-EMF drives a braking current through the short circuit (LL → motor → LR). The braking torque is proportional to this current and to motor speed — very effective at high speeds, tapering to zero as the motor decelerates. Stopping distance is much shorter than coast mode.

Coast (High-Impedance Stop)

All four switches open. Motor terminals float. No electrical braking torque — only mechanical friction decelerates the motor. The motor "freewheels" to a slow stop. Useful when you need the motor to spin down gradually, or when you want zero power draw in the stopped state.

Regenerative Braking Subtlety

During short braking, the current flowing through LL and LR dissipates power in the MOSFET on-resistances and in the motor winding resistance. This energy comes directly from the motor's kinetic energy — the motor is acting as a generator. In the TB6612FNG, this energy is dissipated as heat in the IC and motor, not fed back into the supply rail (unlike dedicated regenerative drive systems). But the physics is identical in principle.

PWM-Synchronized Braking

A subtlety in the TB6612FNG control scheme: when the PWM input is used for speed control with a fixed IN1/IN2 direction, the "off" phase of each PWM cycle engages short brake rather than coast. This means during each switching cycle:

PWM ON phase

Drive switches active, current builds in motor winding according to ΔI = V×t_on/L

PWM OFF phase (short brake)

Both low-side switches active, motor current recirculates through LL/LR, decaying slowly

Next PWM ON phase

Drive switches re-activate, current builds again from the non-zero starting point

Because the current never fully collapses during the OFF phase (the brake keeps it recirculating), the average current at a given duty cycle is higher than if coast mode were used for the OFF phase. This gives the TB6612FNG better low-duty-cycle torque than coast-mode switching schemes.

Standby Mode (STBY Pin)

The STBY (Standby) pin is active-HIGH: pulling it LOW forces both H-bridges into a complete shutdown state, where all output transistors turn off (high-impedance) and most internal logic is powered down to reduce quiescent current consumption.

This is useful in battery-powered applications: when the motors are not needed, asserting STBY LOW can reduce IC quiescent current from the active-mode value (~1mA) to the standby value. On this board, STBY (pin 19) is connected via J1 and must be driven HIGH by the controlling microcontroller to enable motor operation.

STBY Must Be Driven High — Not Left Floating

A floating STBY pin will randomly assume HIGH or LOW states depending on noise and leakage currents. The TB6612FNG will behave erratically. If the microcontroller does not use a dedicated GPIO to control STBY, a pull-up resistor (10kΩ) to VCC must be placed on the STBY line to guarantee the active state. On the Hercules board, STBY exits on J1 pin 8 for the host controller to drive.

Connector Interface (J1 and J2)

The board uses two standard 2.54mm pitch 8-pin headers (same Digi-Key part 732-5321-ND) for complete signal and power interfacing. The connectors are arranged with J1 carrying control and supply inputs, and J2 carrying power and motor outputs.

J1 — Control Interface

8P-HDR · 2.54mm pitch · Through-hole
1
VBATT+Motor supply voltage in
2
AIN1Channel A direction bit 1
3
AIN2Channel A direction bit 2
4
VCCLogic supply (3.3V or 5V)
5
GNDCommon ground
6
BIN1Channel B direction bit 1
7
BIN2Channel B direction bit 2
8
GNDCommon ground

J2 — Motor Output

8P-HDR · 2.54mm pitch · Through-hole
1
PWMAChannel A PWM speed signal
2
MOTOR_A+Motor A terminal 1
3
MOTOR_A−Motor A terminal 2
4
GNDCommon ground
5
MOTOR_B−Motor B terminal 2
6
MOTOR_B+Motor B terminal 1
7
PWMBChannel B PWM speed signal
8
GNDCommon ground

Usage Pattern

A host microcontroller connects to J1 with 5 GPIO pins (AIN1, AIN2, BIN1, BIN2 for direction, plus STBY for enable/standby) and 2 PWM outputs (PWMA, PWMB for speed). Two DC motors connect to J2 — polarity determines initial direction convention. VBATT+ and VCC enter through J1, with VBATT+ and motor outputs accessible on J2.

Connector Choice: 2.54mm Pitch Headers

Standard 2.54mm (0.1 inch) pitch headers were chosen for maximum compatibility — these are the most common connector pitch in microcontroller ecosystems (Arduino, Raspberry Pi, STM32 Nucleo boards). The 8-pin count groups related signals per connector, minimizing cross-connections. The same Digi-Key 732-5321-ND part is used for both, simplifying procurement.

LED Power Indicator (R1 + D1)

A simple power-on indicator consists of a green LED (D1, LTST-C171KGKT) and a 5.1kΩ current-limiting resistor (R1), connected between VCC and GND. When VCC is present, the LED illuminates, confirming the logic supply is active.

Current Limiting Resistor Calculation

The forward voltage of the green LTST-C171KGKT LED is approximately 2.2V at 5mA. For 3.3V VCC, the current through R1 is:

LED Current Calculation
I_LED = (V_CC − V_forward) / R1
At VCC = 3.3V: I = (3.3V − 2.2V) / 5100Ω = 1.1V / 5100Ω = 0.216mA ≈ 0.2mA
At VCC = 5.0V: I = (5.0V − 2.2V) / 5100Ω = 2.8V / 5100Ω = 0.549mA ≈ 0.5mA

At 0.2–0.5mA, the LED will be visibly lit but dimly — which is appropriate for a power indicator that should not distract or consume significant current. The LTST-C171KGKT (Lite-On 0805 clear lens green) is rated for 20mA maximum, so the 0.5mA operating current provides a 40× safety margin against LED destruction.

LED on VCC, Not VBATT+

Placing the LED on VCC (not VBATT+) is a deliberate design choice: it confirms that the logic supply is healthy and the IC's internal logic is powered. The motor supply (VBATT+) could be absent without VCC failing. A VCC indicator is more useful diagnostically than a VBATT+ indicator for debugging control-side issues.

Thermal Design and Power Dissipation

Motor driver ICs dissipate power as heat through three mechanisms: transistor on-resistance during conduction, switching losses during transitions, and quiescent supply current. At 100kHz and 1.2A continuous, conduction losses dominate.

Conduction Loss Calculation

Each H-bridge in CW or CCW mode has two transistors conducting simultaneously — one high-side and one low-side. The TB6612FNG's internal on-resistance per switch is approximately 0.5Ω typical (1.0Ω maximum). The total series resistance seen by the motor current is the sum of upper and lower switches:

H-Bridge Conduction Power Dissipation
P_cond = I² × R_total = I² × (R_HS + R_LS)
At I = 1.2A, R_HS = 0.5Ω, R_LS = 0.5Ω (typical):
P_cond = (1.2)² × (0.5 + 0.5) = 1.44 × 1.0 = 1.44W per channel
Both channels: 2 × 1.44 = 2.88W total (worst case, both motors at full load)

Schematic design note: Ron = 5Ω (conservative max including PCB trace resistance)
At 1.2A, 5Ω: P = 1.44 × 5 = 7.2W — exceeds IC package limit without thermal management

Package Thermal Limits

The TB6612FNG in SSOP-24 has a thermal resistance θ_JA (junction to ambient) of approximately 75°C/W in free air. The schematic's power dissipation table (visible on the schematic sheet) shows:

ConfigurationP_D MaximumNotes
IC only (no PCB heatsinking) 0.78W θ_JA ≈ 75°C/W, T_ambient 25°C, T_jmax 125°C
50mm × 50mm board, 1oz Cu, 40% coverage 0.89W PCB copper acts as heatsink, modest improvement
36.2mm × 114.3mm board, 1oz Cu, 30% coverage 1.35W Larger board gives better thermal spreading
Operating Within Thermal Budget

At 1.2A per channel into typical motor loads (I²R per channel ≈ 0.7W at 0.5Ω typical Ron), two channels dissipate approximately 1.4W total. This is within the 1.35W budget of the larger PCB configuration. For applications approaching 3.2A peak, thermal shutdown (internally at Tj = 150°C) will trigger before mechanical damage occurs — the IC is self-protecting.

PCB Copper as Heat Spreader

The motor output traces on the Hercules PCB are rated for 2.4A continuous, meaning they are wide enough (calculated from IPC-2221 trace width tables) to carry this current without exceeding 10°C above ambient rise. This wider copper also acts as a thermal spreader, conducting heat away from the SSOP-24 package pads into the surrounding copper area.

PCB Layout Strategy

The Hercules board is a 2-layer PCB. Unlike the 4-layer boards used for mixed-signal designs, a 2-layer stackup is sufficient here because: (1) component count is minimal, (2) there is no sensitive analog signal path requiring shielding, and (3) high-frequency DDR-class routing constraints don't apply. The design challenge is maximizing copper fill for thermal performance and fitting adequate trace widths in compact board area.

Layer Assignment

LayerGerber FilePrimary Use
Top Copper (GTL) Hercules.GTL All SMD components, most signal routing, VCC and VBATT+ pour fills
Bottom Copper (GBL) Hercules.GBL GND plane, via pads, thermal via connections under IC pads
Top Silkscreen (GTO) Hercules.GTO Reference designators, connector pin 1 markers, board name
Top Solder (GTS) Hercules.GTS Solder mask openings for all top-layer pads

Trace Width for Motor Currents

Motor output traces (MOTOR_A+, MOTOR_A−, MOTOR_B+, MOTOR_B−) carry continuous currents up to 2.4A per the PCB rating. IPC-2221 specifies trace width based on maximum temperature rise above ambient. For 2.4A in external copper (1oz = 35µm):

IPC-2221 Trace Width (Simplified)
W = (I / (k × ΔT^b))^(1/a) / (thickness)
At 2.4A, ΔT=10°C, 1oz outer layer (k=0.048, b=0.44, a=0.725):
Cross-section area ≈ 15.5 mil² → Width ≈ 1.5–2mm (60–80mil) for 1oz Cu
Motor output traces should be at least 60mil wide for 2.4A with 10°C rise

Component Placement Strategy

The Altium pick-and-place file reveals the board coordinates: U1 (TB6612FNG) is centrally placed at (6293, 1425). Decoupling capacitors C1–C4 are all within 0.5–1.5mm of U1's VCC and VBATT+ pins, as required by the app note. J1 and J2 headers are on opposite sides of U1, creating a logical signal-flow topology: inputs arrive on the left (J1), outputs depart to the right (J2).

Drill Statistics

ToolDiameterCountUse
T1 0.711mm (28mil) 25 PTH Header connector through-holes (J1, J2 — 8+8=16 pins + 9 vias)
T2 2.2mm (87mil) 1 PTH Mounting hole (M2 screw clearance)

Altium Designer Workflow

The Hercules board was designed in Altium Designer, which uses a tightly integrated schematic-to-PCB flow. This differs from KiCad (used for the STM32 and Mixed-Signal boards) in several key ways relevant to the design process.

Schematic Capture (.SchDoc)

All components placed and wired in Hercules.SchDoc. Altium uses unified net labels (PWR_PORT symbols for VCC and GND, wire labels for MOTOR_A+, MOTOR_B+, etc.). Component parameters including part numbers, footprint links, and supplier information are stored directly in the schematic component properties.

Component Library Management (.SchLib, .PcbLib)

Custom schematic symbols and PCB footprints for TB6612FNG, connectors, and passives were created in Hercules.SchLib and Hercules.PcbLib. Altium maintains a direct link between schematic pin numbers and PCB pad numbers — any mismatch triggers an ERC/DRC violation.

ECO (Engineering Change Order) Synchronization

After schematic finalization, an ECO is generated to push netlist changes into the PCB editor. The ECO logs (12 files over Oct–Nov 2023) show an iterative process: footprint corrections, pin reassignments, and connector pinout revisions — all reflected in the logs and applied to the PCB with full traceability.

PCB Layout (Hercules.PcbDoc)

Component placement followed by routing in Altium's PCB editor. Design rules (DRC) enforce minimum trace widths, clearances, and drill-to-pad ratios. The interactive router handles differential pairs and length-matching constraints — though Hercules has no high-speed differential nets, the tool's constraint system was used to enforce motor trace width rules.

Output Generation (Job1.OutJob, Job2.OutJob)

Altium's OutputJob system generates all manufacturing outputs from a single configured job file. Job2.OutJob generated: schematic PDF (Job2.PDF), Gerber files (9 layers), NC drill files, pick-and-place data, and the BOM Excel file (Bill of Materials-Hercules.xlsx).

Design Rule Check (DRC)

Final DRC passes before Gerber generation confirm: no trace clearance violations, no unrouted nets, correct hole-to-pad ratios, and silk-screen clearances from pads. The 2023-11-27 Gerber generation date marks successful DRC completion.

Altium vs KiCad: Key Differences

FeatureAltium DesignerKiCad (used in other projects)
License Commercial (expensive) Open-source, free
ECO Flow Native ECO with full audit logs Manual netlist re-import or PCB update
BOM Generation ActiveBOM with live supplier data integration CSV BOM script-based
Component Lib .SchLib/.PcbLib or Altium 365 Vault KiCad Library (separate sym/fp files)
3D View Integrated with STEP export Integrated (KiCad 6+)
File Format Binary .PcbDoc/.SchDoc (not text-diffable) Text-based .kicad_pcb (Git-friendly)

Key Learnings

H-Bridge Physics is Non-Trivial

The shoot-through hazard, dead-time requirements, back-EMF flyback paths, and braking mode differences are all deeply interconnected. Understanding each one at the transistor level made it clear why integrated drivers like the TB6612FNG provide value beyond just board area savings — their internal timing guarantees eliminate entire categories of design risk.

Two Capacitor Values Are Always Better Than One

The 100nF + 10µF pairing on each supply rail was learned by doing: early simulation with only a single 10µF capacitor showed poor high-frequency impedance above 1MHz. A small ceramic bypasses the high-frequency transients that the bulk cap physically cannot respond to fast enough. This two-value strategy is now a default in every power supply decoupling design.

ECO Logs as a Design Diary

The 12 ECO log files spanning 4 days of design work document every netlist change, including a connector pinout revision (J1 AIN1/AIN2 were initially in wrong positions, corrected in the Oct 28 ECO). Keeping ECO logs creates a full audit trail of design decisions — invaluable when debugging board revisions or explaining changes to collaborators.

Thermal Budget Calculation Before Layout

Calculating I²R dissipation before placing components revealed that the TB6612FNG's 0.78W free-air limit would be exceeded at full 1.2A per-channel load on both channels. This drove the decision to use generous copper pours near the IC and route motor traces as wide as the board allowed — pre-layout thermal analysis prevented post-assembly thermal failure.

Short Brake is Better Than Coast for Precision Stopping

Early in the design, coast mode seemed sufficient — just cut power and the motor stops. Understanding the physics of electromagnetic braking made clear that short brake is categorically different: deceleration is proportional to back-EMF (speed), so braking is strongest at high speed and tapers gracefully to zero. For positional control or short stopping distances, short brake is the correct default motor stop mode.

Altium's OutputJob System Eliminates Manual Gerber Errors

Instead of manually configuring each Gerber output, Altium's .OutJob system stores all output settings (layer selections, file naming, drill file format, BOM template) in a reusable configuration. Running the job once produces consistent, properly named outputs every time — eliminating the common mistake of generating Gerbers with a misassigned layer-to-file mapping that causes fab errors.