Pulasthi Peiris
About

A bit about me

I'm an engineer who tests, debugs and builds high-speed hardware. My core strength is deep root-cause debug — I tend not to stop at the metric coming off a test chip, but dig across firmware, RTL, Python and analog schematics until I find the true cause, then engineer and validate the fix. I run manual and automated test plans, build lab tooling and automation in Python and MATLAB, write FPGA logic in SystemVerilog, and I design the boards themselves — from analog and mixed-signal circuits to multi-layer PCBs. I'm just as comfortable at the bench with scopes, BERTs and VNAs as I am in a codebase, and I care about leaving a clear, well-documented trail.

Tools & technologies

🛠️ EDA & Design Software

Altium DesignerKiCadLTspiceVSCodeINCAJIRA

💻 Programming

PythonMATLABVHDLC / ARM AssemblyCMSIS-DSPCursor / Copilot

🔬 Lab Instrumentation

Sampling OscilloscopeReal-Time OscilloscopeBERTVNADMMFrequency GeneratorPower SuppliesTemp Forcing

⚙️ Hardware & Manufacturing

PCB DesignSoldering (SMD & THT)Wiring & HarnessingSignal IntegrityPower IntegrityFailure AnalysisTest AutomationDVP Development

Education & involvement

🎓 McGill University
Bachelor of Engineering — Electrical Engineering
Relevant coursework: IC Mixed-Signal Test Techniques · Microelectronics · Electromagnetics · PCB Design Lead (McGill Formula Electric)
📍 Montreal, Canada · Graduated May 2024
Extracurricular & leadership
PCB Design Lead
McGill Formula Electric · FSAE
Vice President
IEEE McGill Student Branch
Web Developer
Google Developer Student Club · McGill