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Project overview

Hercules is a standalone motor-driver module that sits between a microcontroller (a Pi, an STM32) and two brushed DC motors — brute mechanical force, controlled precisely by digital signals. The goal was the smallest board that could drive two motors bidirectionally at meaningful current, easy to wire via 0.1″ headers, with every component choice deliberate rather than copied from a reference.

The TB6612FNG driver

Toshiba's dual H-bridge driver: two complete bridges of internal MOSFETs, separate logic and power domains, integrated protection, and low on-resistance outputs.

H-bridge topology — the physics

Each channel is four transistors — upper/lower on left and right — with the motor winding between the two half-bridge midpoints. Closing diagonal pairs forces current through the motor in either direction.

VBATT+ ─────┬──────────────┬─────
            │              │
          [UL]            [UR]   ← high-side
            │              │
  MOTOR_A+  ┤   ┌──────┐   ├  MOTOR_A-
            ├───┤  M   ├───┤
            │   └──────┘   │
          [LL]            [LR]   ← low-side
            │              │
GND  ───────┴──────────────┴─────

Forward (CW):  UL+LR on  → current left→right
Reverse (CCW): UR+LL on  → current right→left
Brake:         LL+LR on  → terminals shorted to GND
Coast:         all off   → terminals floating

Drive current is set by the winding: I = (VBATT − V_drop) / R_motor. At startup R_motor is just the DC winding resistance (1–10 Ω) and there's no back-EMF yet, which is why startup current far exceeds running current.

Back-EMF & flyback protection

A spinning motor is also a generator: the armature cutting the stator field induces a back-EMF that opposes the supply. So the running current is

Short-brake mode uses this on purpose: turning both low-side switches on shorts the terminals, and the motor's inertia drives a braking current through that low-impedance path — strong electromagnetic braking that decelerates far faster than coasting.

Power architecture — two independent rails

Two supplies, kept separate: VCC (2.7–5.5 V) for internal logic, input thresholds and STBY; VBATT+ (2.5–13.5 V) switched straight to the motor terminals by the bridge.

Decoupling strategy

Each rail (VCC and VBATT+) gets a 100 nF + 10 µF pair: the bulk 10 µF handles lower-frequency demand, the small 100 nF ceramic bypasses the fast transients the bulk cap physically can't respond to. Both are X5R, 25 V (a 5× derate on the 5 V rail to keep capacitance up under DC bias), placed right at the IC's supply pins.

Control logic — direction, enable, brake

Each channel takes IN1, IN2 (direction) and PWM (enable/speed); STBY gates both channels.

For speed control you fix IN1/IN2 for direction and vary the PWM duty cycle; the motor sees an average voltage of VBATT+ × duty.

PWM speed control

The 100 kHz switching frequency was chosen for two reasons:

• Above audible — below ~20 kHz the windings whine at the switching frequency; 100 kHz is silent.
• Low current ripple — the winding inductance filters PWM into near-DC current, and higher frequency means smaller ripple.

Braking — short brake vs coast

• Short brake — both low-side switches on, terminals shorted; back-EMF drives a braking current. Torque is proportional to speed (strongest fast, tapering to zero) — much shorter stopping distance.
• Coast — all switches off, terminals float; only mechanical friction decelerates the motor. Useful for a gradual spin-down or zero stopped-state power.

A subtlety: when PWM controls speed at a fixed direction, the OFF phase engages short brake rather than coast, so winding current recirculates through the low-side switches and never fully collapses — giving better low-duty-cycle control than coast-during-off would.

LED indicator, on VCC

The LED is on VCC (not VBATT+) on purpose: it confirms the logic supply is healthy, which is the more useful thing to know when debugging the control side — VBATT+ can be absent without VCC failing.

Thermal design

The SSOP-24's θ_JA is ~75 °C/W in free air, which limits dissipation to ~0.78 W on the bare IC. PCB copper as a heat-spreader raises that — a larger board with 1 oz copper reaches ~1.35 W, enough for ~1.4 W of two-channel load. Push toward 3.2 A peak and the IC's internal thermal shutdown (Tj = 150 °C) trips before damage — it's self-protecting.

PCB layout — 2 layers, done right

2 layers is enough here: few components, no sensitive analog path, no high-speed routing. The real challenge is maximising copper for heat and fitting wide enough traces in a small board. Top carries the SMDs, signal routing and the VCC/VBATT+ pours; bottom is a GND plane with thermal vias under the IC pads.

Altium workflow

This board was my Altium project (the STM32 board was KiCad). Things I leaned on: native ECO flow with full audit logs (12 ECO files over 4 days — including a J1 pinout fix), ActiveBOM with live supplier data, integrated 3D/STEP export, and the OutJob system that stores every Gerber/drill/BOM setting so one click produces consistent, correctly-named outputs — eliminating mis-mapped-layer fab errors.

Key learnings

• H-bridge physics is deeply interconnected — shoot-through, dead-time, flyback paths and braking modes — which is exactly why an integrated driver's timing guarantees are worth more than the board-area saving.
• Two cap values beat one: a 100 nF ceramic covers the HF impedance a 10 µF bulk cap can't — now a default in my decoupling.
• ECO logs are a design diary — a full audit trail of every netlist change.
• Thermal budget before layout: I²R math showed the 0.78 W free-air limit would be exceeded, which drove the copper pours and wide traces.
• Short brake vs coast — braking torque scales with speed, so short brake is the right default for precise stops.
• Altium's OutJob system removes a whole class of manual Gerber-export mistakes.